SW Tools development for SOC

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SW Tools development for SOC

Сообщение AlexNickolaenkov » 10 мар 2010, 15:56

SW Tools development for SOC

Intel Labs, Integrated Platform Research(System on a Chip Tools and Methodology Lab) , is looking for an individual to perform design and development of software tools for innovative methods of System on Chip design using high -level synthesis approach and platform-based design methodology.

The position requires a technical, highly motivated and creative individual with an extensive software development background and deep understanding HW architecture of computation devices and blocks both for PC and embedded market including (but not limited) : micro-processors, DSP, memory architecture , interconnect, ASIP, GPU etc. Qualifications include hands-on experience with the design, development and implementation of high-level languages compilers, debuggers, linkers, IDEs, simulators ; experience with tools development for embedded software and RTL generation and simulation, HW/SW partitioning .
Experience with EDA tools ( especially in design of EDA tools elements) and with modern methods of signal processing (video, communications) as target applications for SOC is a big plus.

  • More than 6-year experience in SW development
  • Skills in C, C++, System C, Java, System Verilog
  • Knowledge of compiler technologies
  • Deep understanding modern HW architecture of SOC and PC platforms (CPU, DSP, GPU, memory, interconnect)
  • Familiarization with modern tools and methods of RTL design (EDA tools)
  • Participation in EDA tools development is big plus
  • Fluent English

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